Mitsubishi Q00JCPU User Manual page 647

APPENDICES
Number Name Meaning
Drive 3/4
Drive 3/4 models
models
SD620
Memory card B Memory card B
models models
Drive 3 (RAM)
SD622 Drive 3 capacity
capacity
Drive 4 (ROM)
SD623 Drive 4 capacity
capacity
Drive 3/4 use Drive 3/4 use
conditions conditions
SD624
Memory card B Memory card B
use conditions use conditions
TableApp.23 Special register
Explanation
• Indicates the drive 3/4 models.
b15 to b8 b7 to b4 b3 to b0
0
Drive 3
(Standrd
RAM)
Drive 4
(Standrd
ROM)
• Indicates the drive 3/4 models.
b15 b8 b7 b4 b3 b0
to to to
0
Drive 3
(Standard RAM)
Drive 4
(Standrd ROM)
• Indicates memory card B models installed
to to to
b15 b8 b7 b4 b3
0
Drive 3 (RAM)
model
Drive 4 (ROM)
model
• Drive 3 capacity is stored in 1 kbyte units.
• Drive 3 capacity is stored in 1 kbyte units.
• Drive 4 capacity is stored in 1 kbyte units.
• Drive 4 capacity is stored in 1 kbyte units.
• The conditions for usage for drive 3/4 are stored as bit patterns.
(In use when ON)
• The significance of these bit patterns is indicated below:
b0 : Boot operation (QBT) b8 : Not used
b1 : Parameters (QPA) b9 : CPU fault history (QFD)
b2 : Device comments (QCD) b10 : SFC trace (QTR)
b3 : Device initial value (QDI) b11 : Local device (QDL)
b4 : File R (QDR) b12 : Not used
b5 : Trace (QTS) b13 : Not used
b6 : Not used b14 : Not used
b7 : Not used b15 : Not used
• The use conditions for memory card B are stored as bit patterns.
(In use when ON)
• The significance of these bit patterns is indicated below:
b0 : Boot operation (QBT) b8 : Simulation data (QDS)
b1 : Parameters (QPA) b9 : CPU fault history (QFD)
b2 : Device comments (QCD) b10 : SFC trace (QTR)
b3 : Device initial value (QDI) b11 : Local device (QDL)
b4 : File R (QDR) b12 : Local device (QDL)
b5 : Sampling trace (QTS) b13 : Not used
b6 : Status latch (QTL) b14 : Not used
b7 : Program trace (QTP) b15 : Not used
Set by
(When set)
S (Initial)
Fixed to 1
Fixed to 3
0: Absent
S (Initial)
1: Present
Fixed at
"3 (FLASH ROM)"
b0
0: Does not exist
S (Initial)
1: SRAM
0: Does not exist
2
2: E PROM
3: Flash ROM
S (Initial)
S (Initial)
S (Initial)
S (Initial)
S (Status
change)
S (Status
change)
Appendix 2 Special Register List
Corres-
ponding
Corresponding CPU
ACPU
D9
Qn(H)
New QnPH
QnPRH
New Q00J/Q00/Q01
Q2A(S1)
Q3A
New
Q4A
Q4AR
Qn(H)
New QnPH
QnPRH
Q2A(S1)
Q3A
New
Q4A
Q4AR
Qn(H)
New QnPH
QnPRH
Q2A(S1)
Q3A
New
Q4A
Q4AR
Qn(H)
New QnPH
QnPRH
Q2A(S1)
Q3A
New
Q4A
Q4AR
App
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