Mitsubishi Q00JCPU User Manual page 59

Q series, logic
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PERFORMANCE SPECIFICATION
.
High Performance model QCPU
Q12HCPU
Q25HCPU
Relay symbol language, logic symbolic language,MELSAP3 (SFC), MELSAP-L, Function block,
----
124k step
252k step
(496k byte)
(1008k byte)
496k byte
1008k byte
Installed memory card capacity(Flash card: 4 Mbyte max., ATA card: 32 Mbyte max.)
496k byte
1008k byte
Process CPU
Q12PHCPU
Q25PHCPU
Repetitive operation of stored program
Refresh mode
structured text (ST)
FBD for process control
0.034 s
0.102 s
----
0.5 to 2000ms (configurable in increments of 0.5 ms)
124k step
252k step
(496k byte)
(1008k byte)
496k byte
1008k byte
Capacity of loading memory cards (2Mbyte max.)
*3
256k byte
496k byte
1008k byte
8k byte
* 4 : The CPU shared memory is not latched.
QCPU User's Manual (Multiple CPU System)
The CPU shared memory is cleared when the power is turned on to the PLC or when the CPU
module is reset.
Redundant CPU
Q12PRHCPU
Q25PRHCPU
Device memory 48k word points: 22ms
Device memory 100k word points: 40ms
124k step
252k step
(496k byte)
(1008k byte)
496k byte
1008k byte
496k byte
1008k byte
----
Remark
----
Direct I/O is possible by direct
I/O specification
(DX
, DY
)
----
Use PX Developer for
programming.
----
----
QnPRHCPU User's
Manual (Redundant
System)
Set parameter values to specify
Section 5.1,Section 5.2
Section 5.1.1,
Section 5.2.1
Section 5.2.4
Section 5.2.4
Section 5.1.3,
Section 5.2.3
Section 5.1.2,
Section 5.2.2
QCPU User's Manual
(Multiple CPU System)
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