Mitsubishi Q00JCPU User Manual page 387

6
FUNCTIONS
No. Item
Online program correction,
10
online file batch-write
File registers having the
11 same file name as the
program name
12 Local devices
Command of intelligent
13 function module that
accesses CPU module
14 Monitor via other station
15 Interrupt counter
(2) Items that are restriced on the high speed interrupt
No.
Item
1 Device comment
2 Index register
3 Bus access flag SM390
4 Forced ON/OFF
Detailed condition
5
monitor
Execution time
6
measurement
Table6.41 Items that are completely disabled (Continued)
Restriction
Online program correction is not available.
Online file batch-write is not available.
File registers having the same file name as the
program name is not available.
Local devices are not available.
Issue of CPU access command from intelligent
function module that accesses CPU module,
e.g. QJ71C24 or QJ71E71, is not available.
Monitor via MELSECNET/H, QJ71C24 or other
intelligent function module is not available during
host monitoring.
Interrupt counter corresponding to interrupt
pointer I49 is not available.
Table6.42 Items that are disabled only within high speed interrupt
Restriction
In high speed interrupt program, device
comment that is the same as program
name is not saved/restored.
In high speed interrupt sequence, index
register is not saved/restored.
In high speed interrupt program, bus
access flag SM390 is not saved/restored.
High speed X/Y refresh area cannot be
turned ON/OFF forcibly.
Cannot be specified within high speed
interrupt program.
Cannot be specified within high speed
interrupt program.
When Used
Since interrupt is disabled during online program correction, a high
speed interrupt start is delayed during that period and therefore high
speed interrupt is not available at preset cycle.
(The following time is taken.
• Max. 102 s for online program correction
• Max. 300ms for online file batch-write)
Since interrupt is disabled when file registers having the same file name
as the program name are changed, high speed interrupt is not available
at preset cycle.(The following time is taken.
• Max. 410 s for standard RAM
• 400 s + 100 s number of program files for SRAM card)
Since interrupt is disabled when local devices are changed, high speed
interrupt is not available at preset cycle.
(The following time is taken.
• 390 s+170 s n for standard RAM
• 390 s+950 s n for SRAM card
n: number of program files)
Since interrupt is disabled at the time of CPU access command issue, a
high speed interrupt start is delayed during that period and high speed
interrupt is not available at preset cycle.
N points read/write: (0.07 N+34) s
N points random read/write: (0.07
If host monitor request and intelligent function module-relayed monitor
request overlap, interrupt disable processing time increases. Therefore,
a high speed interrupt start is delayed (102 s) during that period and
high speed interrupt is not available at preset cycle.
If there is interrupt counter setting, setting for I49 is ignored and high
speed interrupt I49 is executed properly.
(For other interrupt pointers, interrupt programs are not available and
interrupt counters are executed.)
When Used
Device comment in high speed interrupt program is
overwritten.
Index register in high speed interrupt program is overwritten.
SM390 value in high speed interrupt program is overwritten.
In high speed interrupt, forced ON/OFF is not executed and is
ignored.
(Does not result in time-out error.)
Is not executed properly.
(Does not result in time-out error.)
Is not executed and is ignored.
(Does not result in time-out error.)
6.22 High Speed Interrupt Function
6.22.4 Restrictions
N+101) s
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