Mitsubishi Q00JCPU User Manual page 669

APPENDICES
Number Name Meaning
Reason(s) for
Reason(s) for
system
SD1589 system switching
switching failure
failure No.
conditions
Switch request Request origin
network No. network No.
Network module
Network module
SD1590
head address,
head address,
which requested
which requested
system
system switching
switching
Memory copy
Memory copy
SD1595 target I/O
target I/O Number
Number
Memory copy Memory copy
SD1596
status status
TableApp.33 Special register
Explanation
• Stores the reason(s) for system switching failure.
0: System switching normal (default)
1: Tracking cable is not connected , tracking cable error, FPGA circuit
failure.
2: H/W failure, power off, Reset, WDT error on the standby system
3: H/W failure, power off, Reset, WDT error on the Control system
4: Tracking data transfer initialization
5: Communication timeout
6: Serious error(except WDT error) on the Standby system
7: There is difference between both systems
(detected as Backup mode only)
8: During memory copy from control system to standby system
9: During online program change
10: During detection of intelligent function module failure on the standby
system
11: System switching being executed
• Resets to "0" when host system is powered on.
• Resets to "0" once system has been switched successfully.
• Stores the request origin at work No. when the SM1590 is turned on.
• Stores head address of network module which a system switch request
was initiated.
• Turns off automatically by system, after network error is reset by user.
b15 to b11 to b1 b0
SD1590 0 0/1 0/1 0
Module 0:
Module 1:
Module11:
• Please refer to SD1690 which stores the corresponding head address of
network module on other system.
• Stores I/O No.(Standby system CPU module: 3D1
is set to on.
• Stores the execution result of Memory copy function.
0 : Memory copy successfully completed
4241 : Standby system power supply off
H
4242 : Tracking cable is disconnected or is damaged
H
4247 : Memory copy function is being executed
H
4248 : Unsupported memory copy destination I/O Number
H
Set by
(When set)
S(when system
is switched)
S (Error
occurrence)
Each bit
0:OFF
1:ON
CPU module is invalid S (Error
as it is 2-slot model
occurrence/Sta-
Module on right side of
tus change)
CPU module
to
Module at rightmost
end of 12-slot base
(Q312B)
) of before SM1595
H
U
S (Status
change)
Appendix 2 Special Register List
Corres-
ponding
Corresponding CPU
ACPU
D9
QnPRH
New Q4AR
New
QnPRH
New
New
App
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9
10
11