Mitsubishi Q00JCPU User Manual page 650

Q series, logic
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APPENDICES
Number
Name
Meaning
SD738
SD739
SD740
SD741
SD742
SD743
SD744
SD745
SD746
SD747
SD748
SD749
SD750
SD751
SD752
SD753
Message
Message storage
storage
SD754
SD755
SD756
SD757
SD758
SD759
SD760
SD761
SD762
SD763
SD764
SD765
SD766
SD767
SD768
SD769
SD774
PID limit setting
0: Limit set
to
(for complete
1: Limit not set
SD775
derivative)
PID limit setting
0: With limit
SD774
(for exact
1: Without limit
differential)
b0 to b14:
0: Do not
refresh
1: Refresh
Refresh
b15 bit
processing
0: Communication
selection when
SD778
with CPU
the COM
module
instruction is
executed
executed
1: Communication
with CPU
module not
executed
*9: This applies to the CPU of function version B or later.
*11: This applies to the CPU with serial No. of first 5 digits "04012" or later.
App
Appendix 2 Special Register List
- 55
TableApp.24 Special register
Explanation
• Stores the message designated by the MSG instruction.
b15
to
b8
2nd character
SD738
SD739
4th character
SD740
6th character
SD741
8th character
SD742
10th character
SD743
12th character
SD744
14th character
SD745
16th character
SD746
18th character
SD747
20th character
SD748
22nd character
SD749
24th character
SD750
26th character
SD751
28th character
SD752
30th character
SD753
32nd character
SD754
34th character
SD755
36th character
SD756
38th character
SD757
40th character
SD758
42nd character
SD759
44th character
SD760
46th character
SD761
48th character
SD762
50th character
SD763
52nd character
SD764
54th character
SD765
56th character
SD766
58th character
SD767
60th character
SD768
62nd character
SD769
64th character
• Designate the limit for each PID loop as follows:
b15
Loop16
SD774
to
SD775
Loop32
to
• Specify the limit of each PID loop as shown below.
b15
to
b8
SD774
• Selects whether or not the data is refreshed when the COM instruction is
executed.
• Designation of SD778 is made valid when SM775 turns ON.
b15
b14
to
b5
b4
SD778
0/1
0
0/1 0/1 0/1
b7
to
b0
1st character
3rd character
5th character
7th character
9th character
11th character
13th character
15th character
17th character
19th character
21st character
23rd character
25th character
27th character
29th character
31st character
33rd character
35th character
37th character
39th character
41st character
43rd character
45th character
47th character
49th character
51st character
53rd character
55th character
57th character
59th character
61st character
63rd character
b1
b0
Loop2
Loop1
Loop18
Loop17
b7
to
b1
b0
Loop8
Loop2
Loop1
to
b3
b2
b1
b0
0/1
0/1
I/O refresh
CC-Link refresh
MELSECNET/H
refresh
Automatic refresh of
intelligent function
modules
Automatic refresh of
CPU shared memory
(Fixed to "0" for
Redundant CPU)
Execution/non-
execution of
communication with
CPU module
Corres-
ponding
Set by
Corresponding CPU
ACPU
(When set)
D9
S (During
New
execution)
U
New
U
New
Q00J/Q00/Q01
Q00J/Q00/Q01
U
New
Qn(H)
QnPRH
*9
*9
*11
Qn(H)
QnPRH

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