Table of Contents
Advertisement
Memory Configuration
3.1.1 Internal Program Memory
The default internal program memory consists of a 24-bit-wide, high-speed, SRAM occupying
the lowest 32 K (default) in program memory space. The on-chip program RAM is organized in
32 banks with 1024 locations each. You can make additional program memory available using
the memory switch modes.
3.1.2 Memory Switch Modes—Program Memory
Memory switch mode allows reallocation of portions of X and Y data RAM as program RAM.
OMR[7] is the memory switch (MS) bit that controls this function, as follows:
When the MS bit is cleared, program memory consists of the default 32K × 24-bit
memory space described in the previous section. In this default mode, the lowest external
program memory location is $8000.
When the MS bit is set, a portion of the higher locations of the internal X and Y data
memory are switched to internal program memory. The memory switch configuration
(MSW[1:0]) bits (also called M1 and M0) in the OMR select one of the following options:
— MSW[1:0] = 00—The 32K higher locations ($4000 – $BFFF) of the internal X data
memory and the 32K higher locations ($6000 – $BFFF) of the internal Y data memory
are switched to internal program memory. In such a case, the on-chip program memory
occupies the lowest 96K locations ($0 – $17FFF) in the program memory space. The
instruction cache, if enabled, occupies the lowest 1K program words (locations $0 –
$3FF). The lowest external program memory location in this mode is $18000.
— MSW[1:0] = 01—The 24K higher locations ($6000 – $BFFF) of the internal X data
memory and the 24K higher locations ($6000 – $BFFF) of the internal Y data memory
are switched to internal program memory. In such a case, the on-chip program memory
occupies the lowest 80K locations ($0 – $13FFF) in the program memory space. The
instruction cache, if enabled, occupies the lowest 1K program words (locations $0 –
$3FF). The lowest external program memory location in this mode is $18000, while
program memory locations $14000 – $17FFF are considered reserved and should not
be accessed.
— MSW[1:0] = 10—The 16K higher locations ($8000 – $BFFF) of the internal X data
memory and the 16K higher locations ($8000 – $BFFF) of the internal Y data memory
are switched to internal program memory. In such a case, the on-chip program memory
occupies the lowest 64K locations ($0 – $FFFF) in the program memory space. The
instruction cache, if enabled, occupies the lowest 1K program words (locations $0 –
$3FF). The lowest external program memory location in this mode is $18000, while
program memory locations $10000 – $17FFF are considered reserved and should not
be accessed.
3-2
DSP56311 User's Manual, Rev. 2
Freescale Semiconductor
Advertisement
Table of Contents
