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Note:
The 10K lowest locations ($0 – $27FF) of the internal X memory are shared memory,
which is accessible to both the core and the EFCOP. The EFCOP connects to the
shared memory instead of the DMA bus, so there is no DMA accessibility to shared
memory. Simultaneous accesses by the core and the EFCOP to the same memory bank
(1024 locations) of the shared memory are not permitted. It is the programmer's
responsibility to prevent such simultaneous accesses.
3.2.3 Internal X I/O Space
One part of the on-chip peripheral registers and some of the DSP56311 core registers occupy the
top 128 locations of the X data memory ($FFFF80 – $FFFFFF). This area is referred to as the
internal X I/O space and it can be accessed by MOVE, MOVEP instructions and by bit-oriented
instructions (BCHG, BCLR, BSET, BTST, BRCLR, BRSET, BSCLR, BSSET, JCLR, JSET,
JSCLR and JSSET). The contents of the internal X I/O memory space are listed in Appendix A.
3.3 Y Data Memory Space
The Y data memory space consists of the following:
Internal Y data memory (48K by default down to 16K)
Internal Y I/O space (16 locations—$FFFF80 – $FFFF8F)
External Y I/O space (upper 112 locations)
Optional off-chip memory expansion (as much as 128K in 16-bit mode or 256K in 24-bit
mode using the 18 external address lines or 4 M using the external address lines and the
four address attribute lines). Refer to the DSP56300 Family Manual for details on using
the external memory interface to access external Y data memory.
Note:
The Y memory space at locations $FF0000 – $FFEFFF is reserved and should not be
accessed.
3.3.1 Internal Y Data Memory
The default on-chip Y data RAM is a 24-bit-wide, internal, static memory occupying the lowest
48K locations ($0 – $BFFF) in Y memory space. The on-chip Y data RAM is organized in 48
banks, 1024 locations each. Available Y data memory space is reduced and reallocated to
program memory by using the memory switch mode described in the following paragraphs.
Freescale Semiconductor
DSP56311 User's Manual, Rev. 2
Y Data Memory Space
3-5
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