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Enhanced Filter Coprocessor
can continue transferring data whenever the input FIFO becomes empty, while the EFCOP state
machine takes data words from the FIFO whenever required.
10.3.6 EFCOP Operation Examples
The following sections provide examples of how to use the EFCOP in Real FIR Filter and
Adaptive FIR filter mode. Section 10.3.6.4, Verification for Filter Examples, on page 10-32 lists
the programming inputs and outputs for the examples in the following sections.
10.3.6.1 Real FIR Filter
In this example, an N tap FIR filter is represented as follows:
The filter is implemented with three different data transfers using the EFCOP in data
initialization mode:
DMA input/DMA output.
1.
DMA input/polling output.
2.
DMA input/interrupt output.
3.
This transfer combination is only one of many possible combinations.
10.3.6.1.1 DMA Input/DMA Output
A 20-tap FIR filter using a 28-input sample signal is implemented in the following stages:
Set-up:
Set the filter count register (FCNT) to the length of the filter coefficients –1
1.
(that is, N – 1).
Set the Data and Coefficient Base Address pointers (FDBA, FCBA).
2.
Set the operation mode (FCSR[5:4] = FOM[00]).
3.
4.
Set Initialization mode (FCSR[7] = FPRC = 0).
1. For information on DMA transfers, refer to the Freescale application note entitled Using the DSP56300 Direct
Memory Access Controller (APR23/D).
10-14
N 1
–
∑
F n ( )
H i ( )
⋅
=
i
=
0
DSP56311 Reference Manual, Rev. 2
(
)
D n i –
1
Freescale Semiconductor
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