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Mode 3 (internal clock): TRM = 0
N = write preload
M = write compare
TE
Clock
(TIO pin or prescale CLK)
TLR
Counter (TCR)
TCPR
TCF (Compare Interrupt if TCIE = 1)
TOF (Overflow Interrupt if TCIE = 1)
NOTE: If INV = 1, counter is clocked on 1-to-0 clock transitions, instead of 0-to-1 transitions.
9.3.2 Signal Measurement Modes
The following signal measurement and pulse width modulation modes are provided:
Measurement input width (Mode 4)
Measurement input period (Mode 5)
Measurement capture (Mode 6)
Pulse width modulation (PWM) mode (Mode 7)
The external signal synchronizes with the internal clock that increments the counter. This
synchronization process can cause the number of clocks measured for the selected signal value to
vary from the actual signal value by plus or minus one counter clock cycle.
Freescale Semiconductor
first event
N
0
N
M
Figure 9-10. Event Counter Mode, TRM = 0
DSP56311 User's Manual, Rev. 2
if clock source is from TIO pin,
TIO < CPUCLK + 4
N + 1
M + 1
M
Operating Modes
0
1
9-11
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