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Triple Timer Module
The timers in the DSP56311 internal triple timer module act as timed pulse generators or as
pulse-width modulators. Each timer has a single signal that can function as a GPIO signal or as a
timer signal. Each timer can also function as an event counter to capture an event or to measure
the width or period of a signal.
9.1 Overview
The timer module contains a common 21-bit prescaler and three independent and identical
general-purpose 24-bit timer/event counters, each with its own register set. Each timer has the
following capabilities:
Uses internal or external clocking
Interrupts the DSP56311 after a specified number of events (clocks) or signals an external
device after counting internal events
Triggers DMA transfers after a specified number of events (clocks) occurs
Connects to the external world through one bidirectional signal, designated
for timers 0–2.
TIO[0– 2]
When
is configured as an input, the timer functions as an external event counter or measures
TIO
external pulse width/signal period. When
timer, a watchdog timer, or a pulse-width modulator. When the timer does not use
used as a GPIO signal (also called
9.1.1 Triple Timer Module Block Diagram
Figure 9-1 shows a block diagram of the triple timer module. This module includes a 24-bit
Timer Prescaler Load Register (TPLR), a 24-bit Timer Prescaler Count Register (TPCR), and
three timers. Each timer can use the prescaler clock as its clock source.
Freescale Semiconductor
is configured as an output, the timer functions as a
TIO
.
TIO[0–2])
DSP56311 User's Manual, Rev. 2
9
, it can be
TIO
9-1
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