Enhanced Filter Coprocessor; Features - Freescale Semiconductor DSP56311 User Manual

24-bit digital signal processor (dsp)
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Enhanced Filter Coprocessor

The enhanced filter coprocessor (EFCOP) peripheral module functions as a general-purpose,
fully programmable filter. It has optimized modes of operation to perform single-channel and
multichannel real and complex finite impulse response (FIR) filtering with and without adaptive
FIR filtering and decimation or single-channel and multichannel infinite impulse response (IIR)
filtering. EFCOP filter operations complete concurrently with DSP56300 core operations, with
minimal CPU intervention. For optimal performance, the EFCOP has one dedicated Filter
Multiplier Accumulator (FMAC) unit. Thus, for filtering, the combination Core/EFCOP offers
dual MAC capabilities. Its dedicated modes make the EFCOP a very flexible filter coprocessor
with operations optimized for cellular base station applications. The EFCOP architecture also
allows adaptive FIR filtering in which the filter coefficient update is performed using any
fixed-point standard or non-standard adaptive algorithms—for example, the well-known Least
Mean Square (LMS) algorithm, the Normalized LMS, and customized update algorithms. In a
transceiver base station, the EFCOP can perform complex matched filtering to maximize the
signal-to-noise ratio (SNR) within an equalizer. In a transcoder base station or a mobile switching
center, the EFCOP can perform all types of FIR and IIR filtering within a vocoder, as well as
LMS-type echo cancellation. This chapter describes the EFCOP features, architecture, operation,
and programming model.

10.1 Features

Fully programmable real/complex filter machine with 24-bit resolution
FIR filter options
— Four modes of operation with optimized performance:
• Mode 0, FIR machine with real taps
• Mode 1, FIR machine with complex taps
• Mode 2, Complex FIR machine generating pure real/imaginary outputs alternately
• Mode 3—Magnitude (calculate the square of each input sample)
— 4-bit decimation factor in FIR filters providing up to 1:16 decimation ratio
— Easy to use adaptive mode supporting true or delayed LMS-type algorithms
— K-constant input register for coefficient updates (in adaptive mode)
IIR filter options:
— Direct form 1 (DFI) and direct form 2 (DFII) configurations
— Three optional output scaling factors (1, 8, or 16)
Freescale Semiconductor
DSP56311 Reference Manual, Rev. 2
10
10-1

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