Dma Input/Polling Output - Freescale Semiconductor DSP56311 User Manual

10.3.6.1.2 DMA Input/Polling Output

The different stages of input/polling are as follows:
1. Set up:
• Set the filter count register (FCNT) to the length of the filter coefficients – 1 (that
is, N – 1).
• Set the data and coefficient base address pointers (FDBA, FCBA).
• Set the operation mode (FCSR[5:4] = FOM[00]), = 1).
• Set the initialization mode (FCSR[7] = FPRC = 0).
• Set DMA registers: DMA input: as per channel 0 in Section 10.3.6.1.1
Initialization:
2.
• Enable EFCOP FCSR[0] FEN=1.
• Enable DMA input channel, DCR0[23] DE=1.
Processing:
3.
• Whenever the Input Data Buffer (FDIR) is empty (that is, FDIBE = 1), the EFCOP
triggers DMA input to transfer up to four new data words to FDM via FDIR.
• Compute F(n); the result is stored in FDOR.
• The core keeps polling the FCSR[FDOBF] bit and stores the data in memory.
Example 10-2. Real FIR Filtering using DMA input/Polling output
INCLUDE 'ioequ.asm'
;;******************************************************************
; equates
;;******************************************************************
Startequ$00100; main program starting address
FCON equ
; enable the EFCOP
FIR_LEN equ
SRC_ADDRS equ
DST_ADDRS equ
SRC_COUNT equ
DST_COUNT equ
FDBA_ADDRS equ
FCBA_ADDRS equ
;;******************************************************************
Freescale Semiconductor
$001 ; EFCOP FSCR register contents:
20 ; EFCOP FIR length
$3040; DMA source address point to DATA bank
$3000; address at which to begin output
$006003 ; DMA0 count (7*4 word transfers)
8 ; number of outputs generated.
0 ; Input samples Start Address x:$0
0 ; Coeff. Start Address y:$0
DSP56311 Reference Manual, Rev. 2
EFCOP Operation
10-19