Table of Contents
Advertisement
3.3.3 Internal Y I/O Space
The second part of the on-chip peripheral registers occupies 16 locations ($FFFF80 – $FFFF8F)
of the Y data memory. This area is the internal Y I/O space, and it can be accessed by MOVE,
MOVEP instructions and by bit-oriented instructions (BCHG, BCLR, BSET, BTST, BRCLR,
BRSET, BSCLR, BSSET, JCLR, JSET, JSCLR and JSSET). The contents of the internal Y I/O
memory space are listed in Appendix A.
3.3.4 External Y I/O Space
Off-chip peripheral registers should be mapped into the top 112 locations ($FFFF90 – $FFFFFF)
to take advantage of the move peripheral data (MOVEP) instruction and the bit-oriented
instructions (BCHG, BCLR, BSET, BTST, BRCLR, BRSET, BSCLR, BSSET, JCLR, JSET,
JSCLR and JSSET). This area is the external Y I/O space.
3.4 Dynamic Memory Configuration Switching
When the internal memory configuration is altered by remapping RAM modules from X and Y
data memories into program memory space and vice versa, data contents of the switched RAM
modules are preserved. Any sequence that complies with the switch condition is valid. For
example, if the program flow executes in the address range that is not affected by the switch, the
switch condition can be met very easily. A switch can be accomplished just by changing the
OMR[MS/MSW] bits in the regular program flow, assuming no accesses to the affected address
ranges of the data memory occur up to three instructions after the instruction that changes the
OMR bits.
To ensure that dynamic switching is trouble-free, do not allow any
accesses (including instruction fetches) to or from the affected
address ranges in program and data memories during the switch cycle.
Freescale Semiconductor
CAUTION
DSP56311 User's Manual, Rev. 2
Dynamic Memory Configuration Switching
3-7
Advertisement
Table of Contents
