Sci Control Register (Scr) - Freescale Semiconductor DSP56311 User Manual

Serial Communication Interface (SCI)
Mode 0
0 0
WDS2 WDS1 WDS0
TX
(SSFTD = 0)
Mode 2
0 1
WDS2 WDS1 WDS0
TX Start
(SSFTD = 0)
Mode 4
1 0
WDS2 WDS1 WDS0
TX
(SSFTD = 0)
Mode 5
1 0
WDS2 WDS1 WDS0
TX Start
(SSFTD = 0)
Mode 6
1 1
WDS2 WDS1 WDS0
TX Start
(SSFTD = 0)
Data Type: 1 = Address Byte
0 = Data Byte

8.6.1 SCI Control Register (SCR)

The SCR is a read/write register that controls the serial interface operation.
8-10
0
8-bit Synchronous Data (Shift Register Mode)
D0 D1 D2
One Byte From Shift Register
0
10-bit Asynchronous (1 Start, 8 Data, 1 Stop)
D0 D1 D2
Bit
0
11-bit Asynchronous (1 Start, 8 Data, 1 Even Parity, 1 Stop)
Start
D0 D1 D2
Bit
1
11-bit Asynchronous (1 Start, 8 Data, 1 Odd Parity, 1 Stop)
D0 D1 D2
Bit
0
11-bit Asynchronous Multidrop (1 Start, 8 Data, 1 Data Type, 1 Stop)
D0 D1 D2
Bit
• Modes 1, 3, and 7 are reserved.
• D0 = LSB; D7 = MSB.
• Data is transmitted and received LSB first if SSFTD = 0,
or MSB first if SSFTD = 1.
Figure 8-2. SCI Data Word Formats (SSFTD = 0), 2
DSP56311 User's Manual, Rev. 2
D3 D4 D5 D6
D3 D4 D5 D6
D3 D4 D5 D6
D3 D4 D5 D6
D3 D4 D5 D6
D7
D7 or
Stop
Data
Bit
Type
D7 or
Even Stop
Data
Parity Bit
Type
D7 or
Odd Stop
Data
Parity Bit
Type
Stop
Data
D7
Bit
Type
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