External Memory Expansion; Internal Buses - Freescale Semiconductor DSP56311 User Manual

DSP56311 Overview
Memory Configuration. Program RAM, instruction cache, X data RAM, and Y data RAM size
are programmable, as Table 1-2 shows.
Program RAM Instruction Cache
Size Size
32 K × 24-bit
31 K × 24-bit 1024 × 24-bit
96 K × 24-bit
95 K × 24-bit 1024 × 24-bit
80 K × 24-bit
79 K × 24-bit 1024 × 24-bit
64 K × 24-bit
63 K × 24-bit 1024 × 24-bit
48 K × 24-bit
47 K × 24-bit 1024 × 24-bit
*Includes 10 K × 24-bit shared memory (i.e., memory shared by the core and the EFCOP)

1.6.7 External Memory Expansion

Memory can be expanded externlly as follows:
Data memory expansion to two 256 K × 24-bit word memory spaces using the standard
external address lines
Program memory expansion to one 256 K × 24-bit words memory space using the
standard external address lines
Further features of external memory include the following:
External memory expansion port
Simultaneous glueless interface to static random access memory (SRAM) and dynamic
random access memory (DRAM)

1.7 Internal Buses

To provide data exchange between the blocks, the DSP56311 implements the following buses:
Peripheral I/O expansion bus to peripherals
Program memory expansion bus to program ROM
X memory expansion bus to X memory
Y memory expansion bus to Y memory
Global data bus between PCU and other core structures
Program data bus for carrying program data throughout the core
X memory data bus for carrying X data throughout the core
1-10
Table 1-1. DSP56311 Switch Memory Configuration
X Data RAM Size* Y Data RAM Size*
48 K × 24-bit
0
48 K × 24-bit
16 K × 24-bit
0
16 K × 24-bit
24 K × 24-bit
0
24 K × 24-bit
32 K × 24-bit
0
32 K × 24-bit
40 K × 24-bit
0
40 K × 24-bit
DSP56311 User's Manual, Rev. 2
Instruction
Cache (CE)
48 K × 24-bit
disabled
48 K × 24-bit
enabled
16 K × 24-bit
disabled
16 K × 24-bit
enabled
24 K × 24-bit
disabled
24 K × 24-bit
enabled
32 K × 24-bit
disabled
32 K × 24-bit
enabled
40 K × 24-bit
disabled
40 K × 24-bit
enabled
Switch
MSW1 MSW0
Mode (MS)
disabled 0/1 0/1
disabled 0/1 0/1
enabled 0 0
enabled 0 0
enabled 0 1
enabled 0 1
enabled 1 0
enabled 1 0
enabled 1 1
enabled 1 1
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