Watchdog Modes - Freescale Semiconductor DSP56311 User Manual

24-bit digital signal processor (dsp)
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Triple Timer Module
Mode 7 (internal clock): TRM = 0
N = write preload
M = write compare
TE
Clock
(CLK/2 or prescale CLK)
TLR
Counter (TCR)
TCPR
TCF (Compare Interrupt if TCIE = 1)
TCF (Overflow Interrupt if TDIE = 1)
TIO pin (INV = 0)
TIO pin (INV = 1)
NOTE: On overflow, TCR is loaded with the value of TLR.
Figure 9-17. Pulse Width Modulation Toggle Mode, TRM = 0

9.3.4 Watchdog Modes

The following watchdog timer modes are provided:
Watchdog Pulse
Watchdog Toggle
9-18
first event
N
0
N
M
Pulse width
Period
DSP56311 User's Manual, Rev. 2
Period = $FFFFFF - TLR + 1
Duty cycle = ($FFFFFF - TCPR)
Ensure that TCPR > TLR for correct functionality
M
M + 1
0
1
2
Freescale Semiconductor

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