Measurement Capture (Mode 6) - Freescale Semiconductor DSP56311 User Manual

9.3.2.3 Measurement Capture (Mode 6)

Bit Settings
TC3 TC2 TC1
0 1 1
In Mode 6, the timer counts the number of clocks that elapse between when the timer starts and
when an external signal is received. At the first appropriate transition of the external clock
detected on the signal, TCSR[TCF] is set and, if the TCSR[TCIE] bit is set, a compare
TIO
interrupt is generated. The counter halts. The contents of the counter are loaded into the TCR.
The value of the TCR represents the delay between the setting of the TCSR[TE] bit and the
detection of the first clock edge signal on the
whether a high-to-low (1 to 0) or low-to-high (0 to 1) transition of the external clock signals the
end of the timing period. If the INV bit is set, a high-to-low transition signals the end of the
timing period. If INV is cleared, a low-to-high transition signals the end of the timing period.
Mode 6 (internal clock): TRM = 1
N = write preload
M = write compare
TE
Clock
(CLK/2 or prescale CLK)
TLR
Counter
TCR
TIO pin
TCF (Compare Interrupt if TCIE = 1)
NOTE: If INV = 1, a 1-to-0 edge on TIO loads TCR with count and stops the counter.
Freescale Semiconductor
TC0 Mode
0 6
first event
N
0 N
delay being measured
Figure 9-15. Capture Measurement Mode, TRM = 0
DSP56311 User's Manual, Rev. 2
Mode Characteristics
Name Function
Capture Measurement
signal. The value of the INV bit determines
TIO
N + 1 M
M
Operating Modes
TIO Clock
Input Internal
Counter stops
counting; overflow
N N + 1
may occur before
capture (TOF = 1)
Interrupt Service
reads TCR; delay
= M - N clock
periods
9-15