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10.3.1 EFCOP Operation Summary
The EFCOP is very easy to use. To define the type of filtering to perform, you need only set the
following registers (the settings in the FDCH and FACR are optional) and then enable the
EFCOP by setting FCSR[FEN]:
FCNT
FDBA
FCBA
FCSR
Polling, DMA, or interrupts can then be used to write data to the FDIR and read data from the
FDOR. As Table 10-2 shows, the EFCOP operates in many different modes based on the settings
of the control registers. However, the EFCOP performs only two basic types of processing, FIR
filter type and IIR filter type processing. Various sub-options are available with each filter type,
as described in the following sections.
10.3.2 EFCOP Initialization
Before the first sample is processed, the EFCOP filter must be initialized; that is, the input
samples for times before n = 0 (assuming that time starts at 0) must be loaded into the FDM. The
method by which this is done depends on the Filter Type selected.
10.3.2.1 FIR Initialization
The number of samples needed to initialize the filter is the number of filter coefficients minus
one. To select Initialization mode, clear the FCSR[FPRC] bit. If FCSR[FPRC] is set,
initialization is disabled and the EFCOP assumes that the core wrote the initial input values to the
FDM before the EFCOP was enabled. Thus, the first value written to FDIR is the first sample to
be filtered.
If FCSR[FPRC] is clear, initialization mode is enabled and the EFCOP initializes the FDM by
receiving the number of coefficients minus one samples through the FDIR. After samples are
loaded, the next value written to the FDIR is the first sample to be filtered.
10.3.2.2 IIR Initialization
Initialization is always disabled with the IIR filter type, and the FCSR[FPRC] bit is ignored.
Thus, the DSP56300 core must write the initial input values before the EFCOP is enabled. The
first value written to FDIR is always the first sample to be filtered.
Freescale Semiconductor
DSP56311 Reference Manual, Rev. 2
EFCOP Operation
10-7
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