Timer Prescaler Count Register (Tpcr) - Freescale Semiconductor DSP56311 User Manual

Table 9-1. Timer Prescaler Load Register (TPLR) Bit Definitions
Bit Number Bit Name
23
22–21 PS[1–0]
20–0 PL[20–0]

9.4.3 Timer Prescaler Count Register (TPCR)

The TPCR is a read-only register that reflects the current value in the prescaler counter.
23 22 21
11 10 9
PC11 PC10 PC9
Reserved bit; read as 0; write to 0 for future compatibility
Table 9-2. Timer Prescaler Count Register (TPCR) Bit Definitions
Bit Number Bit Name
23–21
20–0 PC[20–0]
Freescale Semiconductor
Reset Value
0 Reserved. Write to zero for future compatibility.
0 Prescaler Source
Control the source of the prescaler clock. The prescaler's use of a TIO signal
is not affected by the TCSR settings of the timer of the corresponding TIO
signal. If the prescaler source clock is external, the prescaler counter is
incremented by signal transitions on the TIO signal. The external clock is
internally synchronized to the internal clock. The external clock frequency
must be lower than the DSP56311 internal operating frequency divided by 4
(that is, CLK/4).
Note:
0 Prescaler Preload Value
Contains the prescaler preload value, which is loaded into the prescaler
counter when the counter value reaches 0 or the counter switches state from
disabled to enabled. If PL[20–0] = N, then the prescaler counts N+1 source
clock cycles before generating a prescaler clock pulse. Therefore, the
prescaler divide factor = (preload value) + 1.
20 19
PC20 PC19
8 7
PC8 PC7
Figure 9-22. Timer Prescaler Count Register (TPCR)
Reset Value
0 Reserved. Write to zero for future compatibility.
0 Prescaler Counter Value
Contain the current value of the prescaler counter.
DSP56311 User's Manual, Rev. 2
Description
To ensure proper operation, change the PS[1–0] bits only when the
prescaler counter is disabled. Disable the prescaler counter by
clearing TCSR[TE] of each of three timers.
PS1 PS0
0 0
0 1
1 0
1 1
18 17 16
PC18 PC17 PC16
6 5 4
PC6 PC5 PC4
Description
Triple Timer Module Programming Model
Prescaler Clock Source
Internal CLK/2
TIO0
TIO1
TIO2
15 14 13
PC15 PC14 PC13
3 2 1
PC3 PC2 PC1
12
PC12
0
PC0
9-23