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Design Considerations
4.4.3
Frequency Jitter Performance
The frequency jitter of the PLL is defined as the variation of the frequency of
. For small MF (MF < 10)
CLKOUT
this jitter is smaller than 0.5 percent. For mid-range MF (10 < MF < 500) this jitter is between 0.5 percent and
approximately 2 percent. For large MF (MF > 500), the frequency jitter is 2–3 percent.
4.5 Input (EXTAL) Jitter Requirements
The allowed jitter on the frequency of
is 0.5 percent. If the rate of change of the frequency of
is slow
EXTAL
EXTAL
(that is, it does not jump between the minimum and maximum values in one cycle) or the frequency of the jitter is
fast (that is, it does not stay at an extreme value for a long time), then the allowed jitter can be 2 percent. The phase
and frequency jitter performance results are valid only if the input jitter is less than the prescribed values.
DSP56311 Technical Data, Rev. 8
4-6
Freescale Semiconductor
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