Link Target Description
Table 2-3. Section Mapping in the Default ADSP-BF535 LDF
Input Section
program
data1
constdata
heap
stack
sysstack
bootup
ctor
argv
For Blackfin processors, you can modify your
objects into L1 memories when they are configured as SRAM.
Memory Characteristics
This section provides an overview of basic memory information (including
addresses and ranges) for target architectures.
Blackfin Processors
Table 2-4
lists memory ranges for the ADSP-BF535 processors. Address
ranges that are not listed are reserved. Blackfin processors have a 32-bit
address range to support memory addresses from
Figure 2-8 on page 2-22
tecture. Other Blackfin processors have different memory architectures.
Refer to Hardware References of target processors for appropriate
information.
2-20
Output Section
dxe_program
dxe_program
dxe_program
dxe_heap
dxe_stack
dxe_sysstack
dxe_
bootup
dxe_program
dxe_argv
shows the ADSP-BF535 processor memory archi-
VisualDSP++ 3.5 Linker and Utilities Manual
Memory Section
MEM_PROGRAM
MEM_PROGRAM
MEM_PROGRAM
MEM_HEAP
MEM_STACK
MEM_SYSSTACK
MEM_BOOTUP
MEM_PROGRAM
MEM_ARGV
file to place
.LDF
to
0x0
0xFFFF FFFF
for 16-Bit Processors
.
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