Analog Devices VisualDSP++ 3.5 Manual page 35

Executables
(.DXE, .SM, .OVL)
Figure 1-3. Loading Diagram
For example, when a Blackfin processor is reset, the boot kernel portion of
the image is transferred to the processor's core. Then, the instruction and
data portion of the image are loaded into the processor's internal RAM (as
shown in Figure
Figure 1-4. Booting from a Bootloadable (.LDR) File
VisualDSP++ 3.5 Linker and Utilities Manual
for 16-Bit Processors
(Simulator, ICE, or EZ-KIT Lite)
Loader
Boot Kernel
(.DXE)
1-4) by the boot kernel.
EPROM EPROM
1 1
Boot Kernel Boot Kernel
2 2
Instructions Instructions
and and
Data Data
Introduction
Debugger
Boot Image
(.LDR)
ADSP-21
Processor DSP
Internal Internal
Memory Memory
1-9