Adsp-219X Dsp Architecture Overview - Analog Devices VisualDSP++ 3.5 Manual

ADSP-219x DSP Architecture Overview

Figure 2-7 shows the ADSP-219x DSP core architecture. The ADSP-219x
architecture is code-compatible with ADSP-218x DSPs. However, the
ADSP-219x architecture has several enhancements over the ADSP-218x
architecture, including single or dual-core architecture, three computa-
tional units, two data address generators, a program sequencer, a JTAG
port, a 24-bit address reach, and an instruction cache. These enhance-
ments make ADSP-219x DSPs more flexible and easier to program.
Figure 2-7. ADSP-219x DSP Basic Functional Block Diagram
For example, the ADSP-2191M DSP has a single-core architecture that
integrates 64K words of on-chip memory configured as 32K words
(24-bit) of program RAM, and 32K words (16-bit) of data RAM.
Power-down circuitry is also provided to reduce power consumption.
VisualDSP++ 3.5 Linker and Utilities Manual
for 16-Bit Processors
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