Analog Devices VisualDSP++ 3.5 Manual page 52

Link Target Description
All ADSP-218x DSPs (except for the ADSP-2181 and ADSP-2183 DSPs)
can be configured in either a Host Mode or a Full Memory Mode. In Host
Mode, each processor has an Internal DMA (IDMA) port for connection
to external host systems. The IDMA port provides transparent, direct
access to the DSP's on-chip Program and Data RAM. Since the
ADSP-2181 and ADSP-2183 DSPs have complete address, data, and
IDMA busses, these two processors provide both IDMA and BDMA func-
tionality concurrently to provide greater system functionality without
additional external logic.
In Full Memory Mode, ADSP-218x processors have complete use of the
external address and data buses. In this mode, the processors behave as
ADSP-2181 and ADSP-2183 processors with the IDMA port removed.
Program Memory (Full Memory Mode) is a 24-bit-wide space for storing
instruction opcodes and data. The ADSP-218x DSPs have up to 48K
words of Program Memory RAM on chip, and the capability of accessing
up to two 8K external memory overlay spaces by means of the external
data bus. Program Memory (Host Mode) allows access to all internal
memory. External overlay access is limited by a single external address line
(A0). External program execution is not available in the host mode
because of a restricted data bus that is only 16 bits wide.
Data Memory (Full Memory Mode) is a 16-bit-wide space used for stor-
ing data variables and memory-mapped control registers. For example,
ADSP-218xN DSPs have up to 56K words of Data Memory RAM
on-chip. Part of this space is used by 32 memory-mapped registers. Sup-
port also exists for up to two 8K external memory overlay spaces through
the external data bus. All internal accesses complete in one cycle. Data
Memory (Host Mode) allows access to all internal memory. External over-
lay access is limited by a single external address line (A0).
The ADSP-218x processors support memory-mapped peripherals with
programmable wait state generation through a dedicated 2048 location
I/O Memory space.
2-16 VisualDSP++ 3.5 Linker and Utilities Manual
for 16-Bit Processors