IBM PowerPC 405GP User Manual page 8

Conditional Branch Condition Register Testing ......................................................................................... 3-35
BO Field on Conditional Branches ............................................................................................................ 3-35
Branch Prediction ...................................................................................................................................... 3-36
Speculative Accesses .................................................................................................................................... 3-37
Speculative Accesses in the PPC405GP .................................................................................................. 3-37
Prefetch Distance Down an Unresolved Branch Path .......................................................................... 3-38
Prefetch of Branches to the CTR and Branches to the LR ................................................................... 3-38
Preventing Inappropriate Speculative Accesses ....................................................................................... 3-38
Fetching Past an Interrupt-Causing or Interrupt-Returning Instruction ................................................. 3-39
Fetching Past tw or twi Instructions ...................................................................................................... 3-39
Fetching Past an Unconditional Branch ................................................................................................ 3-40
Suggested Locations of Memory-Mapped Hardware ............................................................................ 3-40
Summary ................................................................................................................................................... 3-41
Privileged Mode Operation ............................................................................................................................ 3-41
MSR Bits and Exception Handling ............................................................................................................ 3-41
Privileged Instructions ............................................................................................................................... 3-42
Privileged SPRs ........................................................................................................................................ 3-42
Privileged DCRs ........................................................................................................................................ 3-43
Synchronization ............................................................................................................................................. 3-43
Context Synchronization ........................................................................................................................... 3-44
Executio!,,! Synchronization ........................................................................................................................ 3-46
Storage Synchronization ........................................................................................................................... 3-46
Instruction Set ................................................................................................................................................ 3-47
Instructions Specific to IBM PowerPC Embedded Processors ................................................................. 3-48
Storage Reference Instructions ................................................................................................................. 3-48
Arithmetic Instructions ............................................................................................................................... 3-49
Logical Instructions ....................................................................................................................................
3-50
Compare Instructions ................................................................................................................................ 3-50
Branch Instructions .................................................................................................................................... 3-51
CR
Logical Instructions .........................................................................................................................
3-51
Rotate Instructions ................................................................................................................................ 3-51
Shift Instructions ................................................................................................................................... 3-52
Cache Management Instructions .......................................................................................................... 3-52
Interrupt Control Instructions ..................................................................................................................... 3-52
TLB Management Instructions .................................................................................................................. 3-53
Processor Management Instructions .......................................................... ; .............................................. 3-53
Extended Mnemonics ................................................................................................................................ 3-53
Chapter 4. Cache Operations ................................................................................................ 4-1
ICU Organization ............................................................................................................................................ 4-2
ICU Operations ............................................................................................................................................ 4-3
Instruction Cachability Control ..................................................................................................................... 4-4
Instruction Cache Synonyms ....................................................................................................................... 4-4
ICU Coherency ............................................................................................................................................. 4-5
DCU Organization ............................................................................................................................................ 4-5
DCU Operations .......................................................................................................................................... 4-6
DCU Write Strategies .................................................................................................................................. 4-7
DCU Load and Store Strategies .................................................................................................................. 4-7
Data Cachability Control .............................................................................................................................. 4-8
DCU Coherency .......................................................................................................................................... 4-9
Cache Instructions ........................................................................................................................................... 4-9
ICU Instructions ........................................................................................................................................... 4-9
DCU Instructions ....................................................................................................................................... 4-10
Cache Control and Debugging Features ....................................................................................................... 4-11
CCRO Programming Guidelines ................................................................................................................ 4-13
ICU Debugging .......................................................................................................................................... 4-14
Preliminary Contents
vii