IBM PowerPC 405GP User Manual page 197

Embedded processor
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26:30
UDIV
UART Internal Clock Divisor
UDIV specifies the divisor of the CPU clock
00000 Divide by 1
frequency used to derive a UART serial
00001 Divide by 2
clock frequency. For example, if the CPU is
00010 Divide by 3
running at 200M Hz, a divider value of 20
sets the serial clock frequency to 10MHz.
Note:
The maximum serial clock
frequency is less than 1/2
x
OPS
11110 Divide by 31
frequency
11111 Divide by 32
31
...
Reserved
....
7-14
PPC405GP User's Manual
Preliminary

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