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WLA
+
12111
01
Figure 17-20. PTM 2 Local Address Register (PCILO_PTM1 LA)
Writable PTM 1 Local Address
Writable
PTM 1 Local Address
Always 0
17.5.2.15 PTM 2 Memory Size/Attribute Register (PCILO_PTM2MS)
PCILO_PTM2MS defines the size of the region of PCI memory space mapped to local (PLB) space
through PTM 2.
SIZE
1
31
*
12111
tlol
t
ENA
Figure 17-21. PTM 2 Memory Size/Attribute Register (PCILO_PTM2MS)
31:12
MASK
11 :1
o
EMM
Defines the size of the region of PCI
memory space mapped to local (PLB)
space using PTM 2.
Defines the size of the region of PCI
memory space mapped to local (PLB)
space using PTM 2.
Determines if range 2 is enabled to map
PCI memory space to PLB space.
The minimum range size is 4KB. Valid
ranges are always a power of 2.
For example, a value of OxFFOOOOOO
indicates that the region contains 16MB.
The minimum range size is 4KB. Valid
ranges are aJways a power of 2.
For example, a value of OxFFOOOOOO
indicates that the region contains 16MB.
When EMM is disabled, PCICO_PTM2BAR
cannot be written. Set PCICO_PTM2BAR
to 0 before disabling EMM.
17.5.2.16 PTM 2 Local Address Register (PCILO_PTM2LA)
This register defines the local (PLB) address generated in response to a PCI access to local (PLB)
space through PTM 2. See "PTM 1 Local Address Register (PC I LO_PTM 1 LA)" on page 17-27 for
more information.
17-28
PPC405GP User's Manual
Preliminary
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