IBM PowerPC 405GP User Manual page 361

Embedded processor
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PTD
EMPL
CSTC
EMS
PMT
...
...
...
...
...
1
0
1
1
1 2
415 61 7 8191101111213114115
19 1 20
31 1
t
t
t
t
t
EBTC
RTC
EM PH
BPF
PME
Figure 16-15. EBC Configuration Register (EBCO_CFG)
0
EBTC
External Bus Three-State Control
Default after reset is EBTC=1 . See "Effect of
o
Address, data and control signals are
Driver Enable Programming on EBC Signal
high-Z between EBC transfers.
States" on page 16-5.
1 Between EBC transfers the peripheral data
bus, address bus and control signals are
driven.
1
PTD
Device-Paced Time-out Disable
If PTD=1, the EBC waits indefinitely for
o
Enabled time-outs
assertion of PerReady during device-paced
1 Disable time-outs
accesses.
2:4
RTC
Ready Timeout Count
When PTD=O, the number of cycles from
000 16 PerClk cycles
PerAddrO:31 changing until a time-out error
001 32 PerClk cycles
occurs.
010 64 PerClk cycles
011 128 PerClk cycles
100 256 PerClk cycles
101 512 PerClk cycles
110 1024 PerClk cycles
111 2048 PerClk cycles
5:6
EMPL
External Master Priority Low
The PLB priority for external master initiated
00 Low
transfers when the external master hold
01 Medium low
priority input is low (HoldPri=O).
10 Medium high
11 High
7:8
EM PH
External Master Priority High
The PLB priority for external master initiated
00 Low
transfers when the external master hold
01 Medium low
priority input is high (HoldPri=1).
10 Medium high
11 High
9
CSTC
Chip Select Three-state Control
Default after reset is CSTC=1. See "Effect of
o
PerCSO:7 are high-Z between EBC
Driver Enable Programming on EBC Signal
transfers and when an external master is
States" on page 16-5.
active (HoldAck=1)
1 PerCSO:7 are always driven.
10:11
BPF
Burst Prefetch
Controls the amount of data prefetching
00 Prefetch 1 doubleword
when the EBC is servicing a PLB burst read.
01 Prefetch 2 doublewords
For most applications set this field to ObOO.
10 Prefetch 4 doublewords
11 Reserved
16-24
PPC405GP User's Manual

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