IBM PowerPC 405GP User Manual page 616

Embedded processor
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Chapter 22. IIC Bus Interface
The PPC405GP provides an inter-integrated circuit (IIC) bus interface complying with specifications
contained in the Philips® Semiconductors document The lC-bus and how to use it (including
specifications) (1995 update).
The IIC bus is a two-wire, bi-directional, open-drain, low-speed serial interface. The serial clock
(IICSCL) and serial data (IICSDA) lines are bidirectional, to support multiple bus masters and to mix
high- and low-speed devices on the same bus.
The IIC interface (referred to as IIC to distinguish it from the Philips
1 2
C bus) supports the following
standard and enhanced features:
• 100-kHz and 400-kHz operation
• 8-bit data transfers
• 7 -bit and 1 O-bit addressing
• Slave transmitter and receiver
• Master transmitter and receiver
• Multiple bus masters
The IIC interface can switch between 7-bit and 10-bit addressing under program control.
22.1 Addressing
The IIC interface supports 7-bit and 10-bit addressing for master and slave transfers.
Addressing is described in detail in "IICO Low Master Address Register" on page 22-5, "IICO High
Master Address Register" on page 22-6, "IICO Low Slave Address Register" on page 22-14, and "IICO
High Slave Address Register" on page 22-14.
Descriptions of addressing modes and address formats follow.
22.1.1 Addressing Modes
For master transfers, the address mode (AMD) field of the IIC Control register (IICO_CNTL) controls
whether 7-bit or 10-bit addresses are used. If IICO_CNTL[AMD]
=
0, addresses contain 7 bits; if
IICO_CNTL[AMD]
=
1, addresses contain 10 bits.
For slave transfers, the contents of the IICO High Slave Address register (IICO_HSADR) determines
whether 7-bit or 10-bit addressing is used. If IICO_HSADR
=
ObOOOOOOOO, 7-bit addressing is used. If
10-bit addressing is to be used for slave transfers, IICO_HSADR
=
Ob1111
Oyyx,
where wcontains
the high-order bits of the 1 O-bit address, and x is a don't care.
Programming Note: For slave transfers, IICO_CNTL[AMD] does not control addressing mode.
Preliminary
lie
Bus Interface
22-1

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