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The exact comparison depends on the page size, as shown in Table 6-1.
Table 6·1. TLB Fields Related to Page Size
Page
SIZE
n
Bits
EPN to EA
Size
Field
Compared
Comparison
1KB
000
22
EPN O : 2 1
H
EAO:21
4KB
001
20
EPN O : 19
H
EA O : 19
16KB
010
18
EPNO:17
H
EAO:17
64KB
011
16
EPN O : 15
H
EAO:15
256KB
100
14
EPN O : 13
H
EAO:13
1MB
101
12
EPN O : 11
H
EAO:11
4MB
110
10
EPN O : 9
H
EAO:9
16MB
111
8
EPN O : 7
H
EAO:7
SIZE (page size, 3 bits)
Selects one of the eight page sizes, 1 KB-16MB, listed in Table 6-1.
V (valid,1 bit)
Indicates whether a TLB entry is valid and can be used for translation.
RPN Bits
Set to 0
-
RPN 2O : 21
RPN18:21
RPN 16 : 21
RPN 14 : 21
RPN12:21
RPN
1O :
21
RPN 8 : 21
A valid TLB entry implies read access, unless overridden by zone protection. TLB_entry[V] can be
written using a tlbwe instruction. The tibia instruction invalidates all TLB entries.
TID (translation ID, 8 bits)
Loaded from the PID register during a tlbwe operation. The TID value is compared with the PID value
during a TLB access. The TID provides a convenient way to associate a translation with one of 255
unique software entities, typically a process or thread ID maintained by operating system software.
Setting TLBHI[TID] = OxOO disables TID-PID comparison and identifies a TLB entry as valid for all
processes; the value of the PID register is then irrelevant.
6.3.2.2
Translation Field
When a TLB entry is identified as matching an EA (and possibly the PID), TLBLO[RPN] defines how
the EA is translated.
RPN (real page number, 22 bits)
Replaces some, or all, of EA o : 21 , depending on page size. For example, a 16KB page uses EAo:17 for
comparison. The translation mechanism replaces EAo:17 with TLBLO[RPN]o:17 to form the physical
address, and EA 18 : 31 becomes the real page offset, as illustrated in Figure 6-1.
6-4
Programming Note: Software must set all unused bits of RPN (as determined by page size) to O.
See Table 6-1.
PPC405GP User's Manual
Preliminary
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