Pci Bridge Configuration Registers; Pci Bridge Register Summary; Table 17-7. Collision Resolution - IBM PowerPC 405GP User Manual

there are no restrictions. Configuration reads have no restrictions; however, only one internal
configuration access (PLB or PCI side) may be serviced at a time.
Table 17-7. Collision Resolution
PLB Non-postable
Access Type PLB Read from PCI PLB Postable Write to PCI Write to PCI
PCI Write to PLB Rearbitrate PLB master No conflict Rearbitrate PLB master
(reads flush writes)
PCI Read from PLB
Rearbitrate PLB master No conflict Rearbitrate PLB master
17.5 PCI Bridge Configuration Registers
The PCI bridge has two sets of configuration registers for configuring the bridge, handling errors, and
reporting status. Local configuration registers control PLB functions, and are accessed only from the
PLB. The PCI configuration registers control PCI functions, and can be accessed from the PLB and
the PCI. In addition, the mechanism used to access the bridge configuration registers may also be
used to configure other devices on the PCI bus.
17.5.1 PCI Bridge Register Summary
Table 17-8 provides a summary of all of the PCI bridge registers. The registers are discussed in detail
in the following sections. See Chapter 8, "Reset and Initialization," for register reset values.
Table
17-8.
Directly Accessed
MMIO
Registers
Register Address Access ,Description Page
PCILO_PMMOLA
OxEF400000 RIW
PMM 0 Local Address 17-21
PCILO_PMMOMA OxEF400004 RIW PMM 0 Mask/Attribute 17-25
PCILO_PMMOPCILA
OxEF400008
RIW
PMM 0 PCI Low Address 17-22
PCILO_PMMOPCIHA
OxEF40000C
RIW
PMM 0 PCI High Address
17-23
PCILO_PMM1 LA OxEF400010 RIW PMM 1 Local Address 17-23
PCILO_PMM1 MA OxEF400014
RIW
PMM 1 Mask/Attribute 17-21
PCILO_PMM1 PCILA OxEF400018 RIW PMM 1 PCI Low Address 17-24
PCILO_PMM1 PCIHA OxEF40001C
RIW
PMM 1 PCI High Address 17-25
PCILO_PMM2LA OxEF400020
RIW
PMM 2 Local Address 17-25
PCILO_PMM2MA
OxEF400024 RIW PMM 2 Mask/Attribute 17-25
PCILO_PMM2PCILA
OxEF400028
RIW
PMM 2 PCI Low Address 17-26
PCILO_PMM2PCIHA OxEF40002C RIW
PMM 2 PCI High Address
17-27
PCILO_PTM1 MS OxEF400030
RIW
PTM 1 Memory Size/Attribute 17-27
PCILO_PTM1LA OxEF400034 RIW PTM 1 Local Address 17-27
PCILO_PTM2MS OxEF400038 RIW PTM 2 Memory Size/Attribute 17-28
PCILO_PTM2LA
OxEF40003C
RIW
PTM 2 Local Address 17-28
Preliminary
~CI
Interface
17-19