IBM PowerPC 405GP User Manual page 664

Embedded processor
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implementation 3-15
writing 3-15
timer interrupts
programming note 10-38
timers
FIT 11-5
fixed interval timer 11-5
PIT 11-4
programmable interval timer 11-4
TCR 11-9
timer control register 11-9
timer status register 11-8
TSR 11-8
watchdog 11-6
timings
instruction C-3
branches and cr logicals C-3
general rules C-3
instruction cache misses C-7
loads and stores C-6
strings C-6
TLB (translation lookaside buffer) 6-2
access protection 6-12, 6-15
and cacheability control 4-8
execute permissions 6-13
interrupts 6-9
invalidate instruction 6-11
management instructions 3-53
preventing miss interrupts 6-10
read/write instructions 6-11
search instructions 6-11
sync instruction 6-11
zone protection 6-13
See a/so ITLB;UTLB;DTLB
tibia 24-183
and TLB management 6-11
tlbre 24-184
and TLB management 6-11
tlbsx 24-186
and TLB management 6-11
tlbsx. 24-186
and TLB management 6-11
tlbsync 24-187
and TLB management 6-11
tlbwe 24-188
and TLB management 6-11
transfer protocol
processor local bus 2-3
translation 10. See TID
translation lookaside buffer.
See
TLB
translation, address. See address translation
trap 24-191
TSR 11-8, 25-238
tw 24-190
fetching past 3-39
tweq 24-191
tweqi 24-194
twge 24-191
twgei 24-194
twgle 24-191
twgt 24-191
Preliminary
twgti 24-194
twi 24-193
fetching past 3-39
twle 24-191
twlei 24-194
twlgei 24-194
twlgt 24-191
twlgti 24-194
twlle 24-192
twllei 24-194
twllt 24-192
twllti 24-194
twlng 24-192
twlngi 24-194
twlnl 24-192
twlnli 24-195
twit 24-192
twlti 24-195
twne 24-192
twnei 24-195·
twng 24-192
twngi 24-195
twnl 24-192
twnli 24-195
U
UART Reset and Sleep mode 21-16
UARTx_DLL 25-239
UARTx_DLM 25-240
UARTx_FCR 25-241
UARTx_IER 25-242
UARTx_IIR 25-243
UARTx_LCR 25-244
UARTx_LSR 25-245
UARTx_MCR 25-247
UARTx_MSR 25-248
UARTx_RBR 25-249
UARTx_SCR 25-250
UARTx_THR 25-251
UICO_CR 25-252
UICO_ER 25-255
UICO_MSR 25-258
UICO_PR 25-261
UICO_SR 25-264
UICO_TR 25-267
UICO_VCR 25-270
UICO_VR 25-271
unconditional branches
AA field 3-34
speculative accesses 3-40
unified TLB. See UTLB
user mode
defined 3-41
registers 3-5
user programming model 3-1
user-defined (UO) storage attribute
controlled by SUOR 6-19
USPRGO 3-11, 25-272
UTLB (unified translation lookaside buffer)
access control fields 6-5
entry format, illustrated 6-3
EPN field 6-3
Index
X-19

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