IBM PowerPC 405GP User Manual page 441

Embedded processor
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Cycles
PLBClk
BED:?
I
I
I
I
I
ABusO:31
iii. i l l ' " " , , ·
AddrAck ,-' _'-----'-_'------'-_"'-----'-_"'-----'-_"'-----'-_"'----'-_-'-----'-_-'-------'-_-'-------'-_-'---_
RdDBusO:31
RdDBus32:63
PCIClk
PCIAD31:0
PCIC[BE]3:D
L I _ _ _ _ _ _ _ _ _ _ _
..-:.:.:hO::....-_ _ _ _ _ _ _ _ _ _ _ ~-------l
PCIFrame -,-' _---'-_ _ "'--_-'-_----'-_-----' _ _ -'--_--'--_----'-_----' _ _ -'--_--'--_----'-_----'-
PCIIRDY~' _~--~-~-~-~--~-~-~-~--~-~-~-~
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PCIStop
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PCIDevSel _' _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _
Figure 17-60. PCI Master Burst Read From SDRAM (Continued)
17-70
PPC405GP User's Manual
Preliminary

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