System Management Register Descriptions; Vid-Vendor Identification Register (Function 3); Did-Device Identification Register (Function 3); Pcicmd–Pci Command Register (Function 3) - Intel 460GX Software Developer’s Manual

SM Bus Controller Configuration
14.2

System Management Register Descriptions

This section describes in detail the registers associated with the IFB System Management Function.
14.2.1 VID–Vendor Identification Register (Function 3)
Address Offset:
Default Value:
Attribute:
The VID Register contains the vendor identification number. This register, along with the Device
Identification Register, uniquely identifies any PCI device. Writes to this register have no effect.
Bit
15:0
14.2.2 DID–Device Identification Register (Function 3)
Address Offset:
Default Value:
Attribute:
The DID Register contains the device identification number. This register, along with the VID
Register, defines the IFB Power Management Controller. Writes to this register have no effect.
Bit
15:0
14.2.3 PCICMD–PCI Command Register (Function 3)
Address Offset:
Default Value:
Attribute:
This register controls access to the I/O space registers.
Bit
15:10
9
8:5
4
3
2
14-2
00–01h
8086h
Read only
Vendor Identification Number. This is a 16-bit value assigned to Intel.
02-03h
7603h
Read only
Device Identification Number. This is a 16-bit value assigned to the IFB System Management
Controller.
04-05h
00h
Read/Write
Reserved. Read 0.
Fast Back to Back Enable (Not Implemented). This bit is hardwired to 0.
Reserved. Read as 0.
Memory Write and Invalidate Enable (Not Implemented). This bit is hardwired to 0.
Special Cycle Enable (SCE). 1 = Enable, the IFB recognizes the Stop Grant special cycle.
0=Disable. The SCE bit in Function 1 PCI Command register controls IFB response to the
Shutdown special cycle.
Bus Master Enable (Not Implemented). This bit is hardwired to 0.
Description
Description
Description
Intel® 460GX Chipset Software Developer's Manual