Intel 460GX Software Developer’s Manual page 68

Register Descriptions
Table 2-6. Memory-mapped Register Summary (Cont'd)
Offset
52h
54h
56h
58h
5Ah
5Ch
5Eh
60h
62h
64h
66h
68h
6Ah
6Ch
6Eh
70h
72h
74h
76h
78h
7Ah
7Ch
7Eh
80h
82h
84h
86h
88h
8Ah
8Ch
8Eh
a. vv is 13h in APIC mode of operation, 21h in SAPIC mode of operation.
The I/O (x)APIC ID register is read/write by software. On reset, this register's contents are reset to
zero. This register is provided for APIC compatibility only and it does not serve any other purpose.
The PID's (x)APIC ID register has a default value of 00000000h. This register should be
programmed with the correct (x)APIC ID value before using the PID in APIC mode. The (x)APIC
ARBID register is also written during a write to this register.
2-48
Name
RTE 33
RTE 34
RTE 35
RTE 36
RTE 37
RTE 38
RTE 39
RTE 40
RTE 41
RTE 42
RTE 43
RTE 44
RTE 45
RTE 46
RTE 47
RTE 48
RTE 49
RTE 50
RTE 51
RTE 52
RTE 53
RTE 54
RTE 55
RTE 56
RTE 57
RTE 58
RTE 59
RTE 60
RTE 61
RTE 62
RTE 63
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Intel® 460GX Chipset Software Developer's Manual
Default Value
00000000_00010000h
00000000_00010000h
00000000_00010000h
00000000_00010000h
00000000_00010000h
00000000_00010000h
00000000_00010000h
00000000_00010000h
00000000_00010000h
00000000_00010000h
00000000_00010000h
00000000_00010000h
00000000_00010000h
00000000_00010000h
00000000_00010000h
00000000_00010000h
00000000_00010000h
00000000_00010000h
00000000_00010000h
00000000_00010000h
00000000_00010000h
00000000_00010000h
00000000_00010000h
00000000_00010000h
00000000_00010000h
00000000_00010000h
00000000_00010000h
00000000_00010000h
00000000_00010000h
00000000_00010000h
00000000_00010000h