Intel 460GX Software Developer’s Manual page 89

Chipset system
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Table 4-1. Address Disposition (Cont'd)
Address Range
FEF0_0000h to FEFF_FFFFh
FF00_0000h to FFFF_FFFFh
1_0000_0000h to TOM
Above TOM
Note: Accesses listed as "unclaimed" in the table for inbound transactions assume the PXB is
programmed correctly. If an access were received up the Expander bus that hits in the listed address
range, then its behavior is the same as outbound transactions to the same range.
Note: The PXB will never respond to an access that it is the master for. This means that an OB access will
not be claimed by the PXB, even if that access hits a range to which the PXB would normally
respond with DEVSEL#.
Note: The only ranges the PXB doesn't claim are MMBASE to MMT, FEF0_0000h to FEFF_FFFFh, and
4G-16M to 4G. If the PCI card initiates a request to any other address, it will be sent up as TPA or
memory.
Intel® 460GX Chipset Software Developer's Manual
Outbound
Inbound
PCI0a
unclaimed
PCI0a
unclaimed
DRAM
DRAM
na
na
System Address Map
Dest. Decision
Reads are sent to PCI-0a for master
abort. Writes get No-Data response
and are dropped. PXB never claims
this range
Firmware region always enabled
main memory (if present) above 4 GB
BINIT
4-9

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