Intel 460GX Software Developer’s Manual page 26

Register Descriptions
Bits
7
6
5:0
2.4.1.2 DEDTID: DED ITID
Bus CBN, Device Number: 00h
Address Offset:
Default Value:
Sticky:
This register is used to capture the ITID for a double bit memory ECC error. The ITID can then be
used to determine the address of the failure. To force the ITID to be cleared and re-used, write a 1
to bit 6. This register is set anytime that the DED bit is sent from the SDC to the SAC on a 'Retire
ITID' command.
Bits
7
6
5:0
2.4.1.3 FSETID: FSE ITID
Bus CBN, Device Number: 00h
Address Offset:
Default Value:
Sticky:
This register is used to capture the ITID for a system bus data error. The ITID can then be used to
determine the address of the failure. To force the ITID to be cleared and re-used, write a 1 to bit 6.
This register is set anytime that the ADE bit is asserted and both SEC and DED are deasserted on a
'Retire ITID' command from the SDC to the SAC. NOTE: this register is set for both processor-
bus errors and errors on the SAC-to-SDC data bus.
2-6
Description
Disable
This bit can be written by software. When set, the ITID is retired immediately and not
captured. Therefore there can be no checking of the address. See
of this bit.
Valid
If set then the ITID in bits 5:0 is valid and shows the address of a single-bit memory error.
Writing a 1 to this bit will clear the ITID and reset the valid bit.
ITID
The ITID of the SEC error. These bits are read-only.
81h
00h
Yes
Description
Disable
This bit can be written by software. When set, the ITID is retired immediately and not
captured. Therefore there can be no checking of the address. See
of this bit.
Valid
If set then the ITID in bits 5:0 is valid and shows the address of a double-bit memory
error. Writing a 1 to this bit will clear the ITID and reset the valid bit.
ITID
The ITID of the double-bit error. These bits are read-only.
82h
00h
Yes
Function:
Size:
Attribute:
Locked:
Function:
Size:
Attribute:
Locked:
Intel® 460GX Chipset Software Developer's Manual
Section 6 for the usage
0
8 bits
Read Only/Write
Clear, Read/Write
No
Section 6 for the usage
0
8 bits
Read Only/Write
Clear, Read/Write
No