Smbus Controller Configuration; Smbus Configuration Registers (Function 3); Pci Configuration Registers-Function 3 (Smbus Controller Interface) - Intel 460GX Software Developer’s Manual

9.4

SMBus Controller Configuration

The IFB PCI function 3 contains the SMBus Controller configuration space.
9.4.1

SMBus Configuration Registers (Function 3)

Table 9-4. PCI Configuration Registers–Function 3 (SMBus Controller Interface)
Configuration Offset
00–01h
02–03h
04–05h
06–07h
08h
09-0Bh
0C-1Fh
20-23h
24-3Bh
3Ch
3Dh
3E-3Fh
40h
41h
42h
43h
41-F3h
F4-F7h
F8-FBh
FC-FFh
Intel® 460GX Chipset Software Developer's Manual
Mnemonic
VID Vendor Identification
DID Device Identification
PCICMD PCI Command
PCISTS PCI Device Status
RID Revision Identification
CLASSC Class Code
– Reserved
BAR Base Address Register
– Reserved
IL Interrupt Line
IP Interrupt Pin
– Reserved
HC Host Configuration
SCOM Slave Command Port
SS1 Slave Shadow Address 1
SS2 Slave Shadow Address 2
– Reserved
– Reserved
– Manufacturer's ID Register
– Reserved
IFB Register Mapping
Register Register Access
RO
RO
R/W
R/WC
RO
RO
–
R/W
–
RW
RO
–
RW
RW
RW
RW
–
–
–
–
9-5