Intel 460GX Software Developer’s Manual page 229

Bit
19:16
15:9
8:0
11.2.9.3 GP TTL
Offset:
Attribute:
Default Value:
Size:
Bit
31:29
28:24
23:20
19:16
15:9
8:0
Intel® 460GX Chipset Software Developer's Manual
Muxed Data: If a data bit is programmed to be an output, then this bit can be updated by software
to drive a value on the output pin. If the data bit is programmed as an input, then this bit reflects
the state of the input pin and cannot be updated by software. This bit cannot be changed once the
GP Lock bit is set. The value of this bit only has meaning if the muxed GPIO is enabled as a GPIO.
Reserved.
Data: If a data bit is programmed to be an output, then this bit can be updated by software to drive
a value on the output pin. If the data bit is programmed as an input, then this bit reflects the state
of the input pin and cannot be updated by software. This bit cannot be changed once the GP Lock
bit is set.
08-0Bh
Read/Write
00000000h
32 bits
Reserved.
Muxed TTL: When set to a '1', and the data bit is programmed as an output, the pin will be
driven with the value of the pin. When set to a '0', and the data bit is programmed as an output,
the pin will be tri-stated when the pin is to be driven to a '1', and driven when the pin is to be
driven to a '0'. The setting of this bit has no effect if the pin is programmed as an input. This bit
cannot be changed once the GP Lock bit is set. The value of this bit only has meaning if the
muxed GPIO is enabled as a GPIO.
Reserved.
Muxed TTL: When set to a '1', and the data bit is programmed as an output, the pin will be
driven with the value of the pin. When set to a '0', and the data bit is programmed as an output,
the pin will be tri-stated when the pin is to be driven to a '1', and driven when the pin is to be
driven to a '0'. The setting of this bit has no effect if the pin is programmed as an input. This bit
cannot be changed once the GP Lock bit is set. The value of this bit only has meaning if the
muxed GPIO is enabled as a GPIO.
Reserved.
TTL: When set to a '1', and the data bit is programmed as an output, the pin will be driven with
the value of the pin. When set to a '0', and the data bit is programmed as an output, the pin will
be tri-stated when the pin is to be driven to a '1', and driven when the pin is to be driven to a '0'.
The value of the pin is determined by XORing the data bit with the invert bit. The setting of this
bit has no effect if the pin is programmed as an input. This bit cannot be changed once the GP
Lock bit is set.
LPC/FWH Interface Configuration
Description
Description
11-39