Svid-Subsystem Vendor Id (Function 1); Sid-Subsystem Id (Function 1); Idetim-Ide Timing Register (Function 1) - Intel 460GX Software Developer’s Manual

12.2.8 SVID–Subsystem Vendor ID (Function 1)
Address:
Default Value:
Attribute:
Bit
15:0
12.2.9 SID–Subsystem ID (Function 1)
Address:
Default Value:
Attribute:
Bit
15:0
12.2.10 IDETIM–IDE Timing Register (Function 1)
Address Offset:
Default Value:
Attribute:
This register controls the IFB's IDE interface and selects the timing characteristics of the PCI Local
Bus IDE cycle for PIO and Bus Master transfers. Note that primary and secondary denotations
distinguish between the cables and the 0/1 denotations distinguish between master (0) and slave
(1).
Bit
15
14
13:12
11:10
Intel® 460GX Chipset Software Developer's Manual
2C-2Dh
0000h
Read only
Subsystem Vendor ID.
2E-2Fh
0000h
Read only
Subsystem ID.
40–41h = Primary Channel 42–43h = Secondary Channel
0000h
Read/Write only
IDE Decode Enable (IDE). 1=Enable. 0=Disable. When enabled, I/O transactions on PCI
targeting the IDE ATA register blocks (command block and control block) are positively decoded
on PCI and driven on the IDE interface. When disabled, these accesses are subtractively decoded
to LPC.
Slave IDE Timing Register Enable (SITRE).
0 Use bits 13:12, 9:8 for both drive 0 and drive 1.
1 Use bits 13:12, 9:8 for drive 0, Slave IDE timing register for drive 1.
IORDY Sample Point (ISP). This field selects the number of PCI clocks between IOR#/IOW#
assertion and the first IORDY sample point.
Bits[13:12] Number of Clocks
00 5
01 4
10 3
11 2
Reserved.
Description
Description
Description
IDE Configuration
12-5