Universal Serial Bus (Usb) Configuration; Pci Configuration Registers (Function 2) - Intel 460GX Software Developer’s Manual

Universal Serial Bus (USB)
Configuration
The IFB integrates one USB Controller. The USB Controller is UHCI 1.1 compliant and
implements the root hub of the USB, which contains two ports.
The IFB PCI Function 2 reflects the USB Host and Root Hubs, with 2 connected USB ports. The
register set associated with USB Host Controller is shown below with actual register descriptions
given in Section 13.2
13.1

PCI Configuration Registers (Function 2)

Table 13-1. PCI Configuration Registers–Function 2
Configuration
Offset
00–01h
02–03h
04–05h
06–07h
08h
09-0Bh
0Ch
0Dh
0Eh
0F–1Fh
20–23h
24–3Bh
2C–2Dh
2E–2Fh
30–3Fh
3Ch
3Dh
3E–5Fh
60h
61–69h
6A–6Bh
6C–BFh
C0–C1h
C2-C3h
C4h
C5-FF
Intel® 460GX Chipset Software Developer's Manual
and Section 13.3.
Mnemonic
VID Vendor Identification
DID Device Identification
PCICMD PCI Command
PCISTS PCI Device Status
RID Revision Identification
CLASSC Class Code
– Reserved
MLT Latency Timer
HEDT Header Type
– Reserved
USBBA USB I/O Space Base Address
– Reserved
SVID Subsystem Vendor ID
SID Subsystem ID
– Reserved
INTLN Interrupt Line
INTPN Interrupt Pin
– Reserved
SBRNUM Serial Bus Release Number
– Reserved
MCR Miscellaneous Control Register
– Reserved
LEGSUP Legacy Support
--- Reserved
USBREN USB Resume Enable
--- Reserved
Register
13
Register
Access
RO
RO
R/W
R/W
RO
RO
–
R/W
RO
–
R/W
–
RO
RO
–
R/W
RO
–
RO
–
R/W
–
R/W
---
R/W
---
13-1