Intel 460GX Software Developer’s Manual page 29

2.4.1.6 SA_FERR: System Address on First Error
Bus CBN, Device Number: 00h
Address Offset:
Default Value:
Sticky:
This register records and latches the address for the first system bus error detected.
Bits
127:107 Reserved (0)
106
105
104
103:99
98
97
96:64
63:43
42
41
40
39:35
34:33
32:0
2.4.1.7 BIUITID: BIU ITID Register
Bus CBN, Device Number: 00h
Address Offset:
Default Value:
Sticky:
A write to this register causes the SAC to update the BIUDATA register with the contents of the
CAM and RAM associated with the ITID that is written into this register.
Bits
7:6
5:0
Intel® 460GX Chipset Software Developer's Manual
60h
undefined after
Yes
Description
LOCK, 'b' phase.
ADS, 'b' phase.
RP#, 'b' phase.
REQ, 'b' phase.
AP1; 'b' phase.
AP0; 'b' phase.
A[35:3]#, 'b' phase.
Reserved (0)
LOCK#, 'a' phase.
ADS#, 'a' phase.
RP# for REQa#.
Parity on REQa# signals.
REQa#.
REQa signals on error.
AP[1:0]#, 'a' phase.
Address parity for failing address.
Aa[35:3]#, 'a' phase.
System Bus - System Address of Error.
80h
0
No
Description
reserved (0)
ITID
This is the ITID that is used to address the CAM/RAM structure.
Register Descriptions
Function: 1
Size: 128 bits
Attribute: Read Only
Locked: No
Function: 1
Size: 8 bits
Attribute: Read/Write
Locked: No
2-9