Avaya S8700 Maintenance Manual page 393

TBRI-PT (ISDN Trunk-Side BRI Port)
CRC Error Counter Test (#623)
This test is nondestructive.
This test reads the BRI port's CRC error counters that are maintained on the BRI
circuit pack. The Cyclic Redundancy Check (CRC) is a means of error detection
used to determine the integrity of data frame contents. The CRC error counter is
incremented by the circuit pack when it detects a CRC error. The test passes if
the value of the counter is 0 (that is, the error is cleared). If the counter is
non-zero, the test fails, and the value of the counter is displayed in the Error
Code field.
Table 8-466. Test #623 CRC Error Counter Test
Error Test
Code Result Description / Recommendation
ANY FAIL This error occurs when a frame with a bad CRC is received over the D channel
by the BRI board. This error is reported on a per-port basis when the counter
goes over the threshold. This error is most likely due to a problem with the
wiring or interference on the wiring caused by a noise source or no termination.
It usually does not indicate a problem with the circuit pack.
PASS The CRC error counter was read correctly and has a value of 0.
Receive FIFO Overflow Error
Counter Test (#625)
This test is nondestructive.
This test reads and clears the BRI port's Receive FIFO Overflow error counter
maintained on the TBRI-BD circuit pack. This counter is incremented by the
circuit pack when it detects an overflow of its receive buffers. The test passes if
the value of the counter is 0 (that is, the error is cleared). If the counter is
non-zero, the test fails, and the value of the counter is displayed in the Error Code
field. This error can occur either if:
Signaling frames are being received from the Packet bus at a rate sufficient
to overflow the receive buffers on the circuit pack for a port
A hardware fault is causing the receive buffers not to be emptied properly
by the circuit pack.
This test is useful for verifying the repair of the problem.
555-233-142
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Issue 1 May 2002 8-1089