Initiator Pressure 1 Register (Init_Pressure_1); Initiator Pressure 1 Register (Init_Pressure_1) Field Descriptions - Texas Instruments TMS320C6A816 Series Technical Reference Manual

C6-integra dsp+arm processors
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1.16.1.3.3 Initiator Pressure 1 Register (INIT_PRESSURE_1)

The INIT_PRESSURE_1 register configures the infrastructure "pressure" input for L3 initiators to provide
dynamic pressure escalation.
The Initiator Pressure 1 Register (INIT_PRESSURE_1) is shown in
Table
1-200.
31
30
29
28
Reserved
Reserved
R/W-0
R/W-0
15
14
13
DSS_CTLR
Reserved
R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 1-200. Initiator Pressure 1 Register (INIT_PRESSURE_1) Field Descriptions
Bit
Field
31-26
Reserved
25-24
DEBUG
23-22
EXP
21-20
GRFX
19-18
Reserved
17-16
PCIE
15-14
DSS_CTLR
13-10
Reserved
9-8
SATA
7-6
USB_QMGR
5-4
USB_DMA
3-2
CPGMAC1
1-0
CPGMAC0
302
Chip Level Resources
Preliminary
Figure 1-159. Initiator Pressure 1 Register (INIT_PRESSURE_1)
27
26
25
Reserved
DEBUG
R/W-0
R/W-0
10
9
SATA
R-0
R/W-0
Value
Description
0
Reserved.
0-3h
Debug Subsystem initiator pressure.
0-3h
Expansion Slot Port initiator pressure.
0-3h
3D Graphics (SGX530) initiator pressure.
0
Reserved.
0-3h
PCIe initiator pressure.
0-3h
HDVPSS Controller initiator pressure
0
Reserved. Read returns 0.
0-3h
SATA initiator pressure.
0-3h
USB Queue Manager initiator pressure.
0-3h
USB DMA port initiator pressure.
0-3h
CPGMAC1 initiator pressure.
0-3h
CPGMAC0 initiator pressure.
© 2011, Texas Instruments Incorporated
Figure 1-159
24
23
22
21
EXP
GRFX
R/W-0
R/W-0
8
7
6
5
USB_QMGR
USB_DMA
R/W-0
R/W-0
www.ti.com
and described in
20
19
18
17
Reserved
PCIE
R/W-0
R/W-0
4
3
2
1
CPGMAC1
CPGMAC0
R/W-0
R/W-0
SPRUGX9 – 15 April 2011
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