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Logic Analyzer Reference
Probing
HP 10463A ECL Clock Pod
Clock output type
Clock output rate
Clock out delay
Clock input type
Clock input rate
Pattern input type
Clk-in to clk-out
Patt-in to recognition
Recommended lead set HP 10474A
276
10H116 differential unterminated; and
differential with 330 ohm to -5.2v and 47 ohm
series
200 MHz maximum
11 ns maximum in 9 steps
ECL - 10H116 with 50 KW to -5.2 V
DC to 200 MHz
ECL - 10H116 with 50 KW
(no connect is logic 0)
Approx. 30 ns
Approx. 15 ns + 1 clk period
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Troubleshooting
