Agilent Technologies HP 1660E Series User Manual page 275

HP 10460A TTL Clock Pod
Clock output type
Clock output rate
Clock out delay
Clock input type
Clock input rate
Pattern input type
Clk-in to clk-out
Patt-in to recognition
Recommended lead set
10H125 with 47 ohm series; true & inverted
100 MHz maximum
11 ns maximum in 9 steps
TTL - 10H124
DC to 100 MHz
TTL - 10H124 (no connect is logic 1)
Approx. 30 ns
Approx. 15 ns + 1 clk period
HP 10474A
Logic Analyzer Reference
Probing
275