Agilent Technologies HP 1660E Series User Manual page 253

Timing Analyzer Configurations
Mode HP 1660E/ES/EP
Conventional 8K-deep / 68 chan.
half-channel 65 data + 3 data or
500 MHz clock
Conventional 4K-deep / 136 chan.
full-channel 130 data + 6 data or
250 MHz clock
Transitional 8K-deep / 68 chan.
half-channel 65 data + 3 data or
250 MHz clock
Transitional 4K-deep / 136 chan.
full-channel 130 data + 6 data or
125 MHz clock
Glitch 4K-deep / 68 chan.
half-channel 65 data + 3 data or
125 MHz clock
Timing Analyzer Configuration Considerations
• Unused clock channels can be used as data channels.
• In Glitch half-channel mode, memory is split between data and glitches.
HP 1660E/ES/EP-Series Configuration Capabilities
HP 1661E/ES/EP HP 1662E/ES/EP
8K-deep / 51 chan. 8K-deep / 34 chan.
48 data + 3 data or 32 data + 2 data or
clock clock
4K-deep / 102 chan. 4K-deep / 68 chan.
96 data + 6 data or 64 data + 4 data or
clock clock
8K-deep / 51 chan. 8K-deep / 34 chan.
48 data + 3 data or 32 data + 2 data or
clock clock
4K-deep / 102 chan. 4K-deep / 68 chan.
96 data + 6 data or 64 data + 4 data or
clock clock
4K-deep / 51 chan. 4K-deep / 34 chan.
48 data + 3 data or 32 data + 2 data or
clock clock
Logic Analyzer Reference
HP 1663E/ES/EP
8K-deep / 17 chan.
16 data + 1 data or
clock
4K-deep / 34 chan.
32 data + 2 data or
clock
8K-deep / 17 chan.
16 data + 1 data or
clock
4K-deep / 34 chan.
32 data + 2 data or
clock
4K-deep / 17 chan.
16 data + 1 data or
clock
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