Agilent Technologies HP 1660E Series User Manual page 404

Logic analyzers
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Logic Analyzer Concepts
Transitional Mode Theory (1660E/ES/EP-series only)
Minimum transitions stored
Sometimes transitions occur at a relatively slow rate, slow enough to
ensure at least one sample with no transitions between the samples
with transitions. This is illustrated in the figure on the next page with
time tags 2, 5, 7, and 14. When transitions happen at this rate, two
cycles are stored for every transition. This means that with 2 K of
memory, 1 K of transitions are stored, or because transitions take one
sample space, 1024 transitions are stored. Subtract 1 for the starting
point and you have a minimum of 1023 stored transitions.
Storing Time Tags and Transitions
Maximum transitions stored
If transitions occur at a fast rate, such that there is a transition at each
sample point, only one sample is stored for each transition as shown by
time tags 17 through 21 above. If this continues for the entire trace, the
number of transitions stored is 2K divided by 1 sample per transition.
Again, you must subtract the starting point sample, yielding a
maximum of 2047 stored transitions.
In most cases a transitional timing trace is stored by a mixture of the
minimum and maximum cases. Therefore, the actual number of
transitions stored will be between 1023 and 2047.
404

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