Output Data Register (Opdr) - Fujitsu MB90460 Series Hardware Manual

CHAPTER 15 MULTI-PULSE GENERATOR
15.4.2

Output Data Register (OPDR)

This is a register which stores the output data to the OPT5 to OPT0 pins.
■ Output Data Upper Register (OPDR)
Address bit 15
003FF9 BNKF RDA2
H
R
X : Indeterminate
R/W : Readable and writable
: Initial value
— : Not used
376
Figure 15.4-4 Output Data Upper Register (OPDR)
14 13 12 11
RDA1 RDA0 OP51
R R R R
BNKF RDA2 RDA1 RDA0
0
0
0
0
0
0
0
0
1
1
1
1
10 9 8 Initial value
OP50 OP41 OP40 0000XXXX
R R R
OP41 OP40
0 0
0 1
1 0
1 1
OP51 OP50
0 0
0 1
1 0
1 1
0 0 0 Data in OPDBR0 is loaded to OPDR.
0 0 1
Data in OPDBR1 is loaded to OPDR.
0 1 0
Data in OPDBR2 is loaded to OPDR.
0 1 1
Data in OPDBR3 is loaded to OPDR.
1 0 0
Data in OPDBR4 is loaded to OPDR.
1 0 1
Data in OPDBR5 is loaded to OPDR.
1 1 0
Data in OPDBR6 is loaded to OPDR.
1 1 1
Data in OPDBR7 is loaded to OPDR.
0 0 0
Data in OPDBR8 is loaded to OPDR.
0 0 1
Data in OPDBR9 is loaded to OPDR.
0 1 0
Data in OPDBRA is loaded to OPDR.
0 1 1
Data in OPDBRB is loaded to OPDR.
Other values
Prohibited.
B
OPT4 output waveform selection bits
Pin OPT4 outputs "L" level.
Pin OPT4 outputs the output of the PPG
timer.
Pin OPT4 outputs the inverted output of
the PPG timer.
Pin OPT4 outputs "H" level.
OPT5 output waveform selection bits
Pin OPT5 outputs "L" level.
Pin OPT5 outputs the output of the PPG
timer.
Pin OPT5 outputs the inverted output of
the PPG timer.
Pin OPT5 outputs "H" level.
OPDBR register selection bits