Registers Of Ei 2 Os Descriptor (Isd) - Fujitsu MB90460 Series Hardware Manual

CHAPTER 7 INTERRUPT
7.6.2 Registers of EI
• Data counter (DCT)
• I/O register address pointer (IOA)
2
• EI OS status register (ISCS)
• Buffer address pointer (BAP)
Note: that the initial value of each register is undefined after a reset.
■ Data Counter (DCT)
The DCT is a 16-bit register that serves as a counter for the data transfer count. After each data transfer,
the counter is decremented by "1". When the counter reaches zero, EI
Figure 7.6-3 shows the configuration of the DCT.
Upper byte of data counter
Initial value
Lower byte of data counter
Initial value
■ I/O Register Address Pointer (IOA)
The IOA is a 16-bit register that indicates the lower address (A15 to A00) of the I/O register used to
transfer data to and from the buffer. The upper address (A23 to A16) is all zeros. Any I/O from 000000
to 00FFFF
Figure 7.6-4 Configuration of I/O Register Address Pointer (IOA)
Upper address pointer
Initial value
Lower address pointer
Initial value
142
2
OS Descriptor (ISD)
Figure 7.6-3 Configuration of DCT
bit 15 14
B15 B14
(X) (X)
bit 7 6
B07 B06
(X) (X)
can be specified by address. Figure 7.6-4 shows the configuration of the IOA.
H
bit 15 14
A15 A14 A13
(X) (X)
7 6
bit
A07 A06 A05
(X) (X)
13 12 11
B13 B12 B11
(X) (X) (X)
5 4 3
B05 B04 B03
(X) (X) (X)
13 12 11 10
A12 A11 A10
(X) (X) (X) (X)
5 4 3
A04 A03 A02
(X) (X) (X) (X)
2
OS terminates.
10 9 8
B10 B09 B08
(X) (X) (X)
2 1 0
B02 B01 B00
(X) (X) (X)
9 8
A09 A08
(X) (X)
2 1 0
A01 A00
(X) (X)
DCTH
DCTL
H
IOAH
IOAL